In recent years, it is required that display driving circuits for driving liquid crystal panels be reduced in scale in order to achieve slim bezel of liquid crystal display devices. Because scales of the display driving circuits largely affect the number of elements of transistors for configuring circuits, it is important to reduce the number of transistors.
Conventional display driving circuits are, for example, signal retention circuits configuring common electrode driving circuits (also referred to as “COM drivers”) and signal retention circuits (hereinafter, referred to as “retention circuit”) configuring retention capacitor line driving circuits (also referred to as “CS driver”) (for example, Patent Literature 1). FIG. 57 is a circuit diagram of a retention circuit configuring a conventional common electrode driving circuit. The common electrode driving circuit supplies a high-level or low-level signal (CMOUT) to each common line (COM line) on the basis of an output signal (SROUT) of each stage of a shift register (not shown) configuring a scanning signal line driving circuit.
Specifically, the common electrode driving circuit is configured by connecting multiple n (n is an integer of 2 or more) retention circuits (hereinafter, referred to as “unit circuits”) (see FIG. 57). Each of the unit circuits is made up of input terminals CK, D, and an output terminal OUT. The output signal SROUT of the shift register is supplied to the input terminal CK, meanwhile, a polarity signal CMI is supplied to the input terminal D. An output of the unit circuit is supplied as the output signal CMOUT to the common line CML.
For example, a (k−1)th output signal SROUT(k−1) of the shift register is supplied to a kth (k is an integer of 1 or more but n or less) unit circuit of the common electrode driving circuit, and the kth unit circuit outputs an output signal CMOUTk to a common line CMLk.
As described above, the common electrode driving circuit subsequently supplies output signals CMOUT1 to CMOUTn to common lines CML1 to CMLn, respectively, while retaining signals inside thereof in accordance with an shift operation of the shift register.